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Ordering number : ENN6235
CMOS IC
LC75844M
1/4 Duty General-Purpose LCD Driver
Overview
The LC75844M is a 1/4 duty general-purpose LCD driver that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75844M can drive an LCD with up to 88 segments directly. The LC75844M can also control up to 4 general-purpose output ports. Since the LC75844M uses separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.
Package Dimensions
unit: mm 3204-MFP36S
[LC75844M]
36 19
Features
* Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 88 segments under serial data control. * Serial data input supports CCB format communication with the system controller. * Serial data control of the power-saving mode based backup function and all the segments forced off function * Serial data control of switching between the segment output port and the general-purpose output port functions * High generality, since display data is displayed directly without decoder intervention. * Independent VLCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) * The INH pin can force the display to the off state. * RC oscillator circuit
15.3 2.15 2.5max 0.65
1
18
0.15
0.35
0.8
0.85
* CCB is a trademark of SANYO ELECTRIC CO., LTD. * CCB is a SANYO's original bus format and all the bus addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
92299TH (OT) No. 6235-1/14
0.1
SANYO: MFP36S
10.5
7.9
9.2
LC75844M
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0 V
Parameter Maximum supply voltage Symbol VDD max VLCD max VIN 1 Input voltage VIN 2 VIN 3 Output voltage VOUT 1 VOUT 2 IOUT 1 Output current IOUT 2 IOUT 3 Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg VDD VLCD CE, CL, DI, INH OSC VLCD 1, VLCD 2 OSC S1 to S22, COM1 to COM4, P1 to P4 S1 to S22 COM1 to COM4 P1 to P4 Ta = 85C Conditions Ratings -0.3 to +7.0 -0.3 to +7.0 -0.3 to +7.0 -0.3 to VDD + 0.3 -0.3 to VLCD + 0.3 -0.3 to VDD + 0.3 -0.3 to VLCD + 0.3 300 3 5 100 -40 to +85 -55 to +125 Unit V V V V V V V A mA mA mW C C
Allowable Operating Ranges at Ta = -40 to +85C, VSS = 0 V
Ratings Parameter Supply voltage Symbol VDD VLCD VLCD1 VLCD2 VIH VIL ROSC COSC fOSC tds tdh tcp tcs tch toH toL tr tf tc VDD VLCD VLCD1 VLCD2 CE, CL, DI, INH CE, CL, DI, INH OSC OSC OSC CL, DI: Figure 2 CL, DI: Figure 2 CE, CL: Figure 2 CE, CL: Figure 2 CE, CL: Figure 2 CL: Figure 2 CL: Figure 2 CE, CL, DI: Figure 2 CE, CL, DI: Figure 2 INH, CE: Figure 3 10 25 160 160 160 160 160 160 160 160 160 0.8 VDD 0 43 680 50 100 Conditions min 2.7 2.7 2/3 VLCD 1/3 VLCD typ max 6.0 6.0 VLCD VLCD 6.0 0.2 VDD Unit V V V V V V k pF kHz ns ns ns ns ns ns ns ns ns s
Input voltage Input high level voltage Input low level voltage Recommended external resistance Recommended external capacitance Guaranteed oscillation range Data setup time Data hold time CE wait time CE setup time CE hold time High level clock pulse width Low level clock pulse width Rise time Fall time INH switching time
Pin Assignment
DI CL CE INH OSC VSS VLCD2 VLCD1 VLCD VDD COM4 COM3 COM2 COM1 S22 S21 S20 S19
LC75844M
P1/S1 P2/S2 P3/S3 P4/S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18
Top view
A12595
No. 6235-2/14
LC75844M Electrical Characteristics for the Allowable Operating Ranges
Ratings Parameter Hysteresis Input high level current Input low level current Symbol VH IIH IIL VOH 1 Output high level voltage VOH 2 VOH 3 VOL 1 Output low level voltage VOL 2 VOL 3 VMID 1 VMID 2 Output middle level voltage*1 VMID 3 VMID 4 VMID 5 Oscillator frequency fOSC IDD 1 IDD 2 ILCD 1 Current drain ILCD 2 ILCD 3 Conditions CE, CL, DI, INH CE, CL, DI, INH; VI = 6.0 V CE, CL, DI, INH; VI = 0 V S1 to S22; IO = -20 A COM1 to COM4; IO = -100 A P1 to P4; IO = -1 mA S1 to S22; IO = 20 A COM1 to COM4; IO = 100 A P1 to P4; IO = 1 mA COM1 to COM4; 1/2 bias, IO = 100 A S1 to S22; 1/3 bias, IO = 20 A S1 to S22; 1/3 bias, IO = 20 A COM1 to COM4; 1/3 bias, IO = 100 A COM1 to COM4; 1/3 bias, IO = 100 A OSC; ROSC = 43 k, COSC = 680 pF VDD; power saving mode VDD; VDD = 6.0 V, output open, fosc = 50 k Hz VLCD; power saving mode VLCD; VLCD = 6.0 V, output open 1/2 bias, fosc = 50 k Hz VLCD; VLCD = 6.0 V, output open 1/3 bias, fosc = 50 k Hz 100 60 230 1/2 VLCD - 0.9 2/3 VLCD - 0.9 1/3 VLCD - 0.9 2/3 VLCD - 0.9 1/3 VLCD - 0.9 40 50 -5.0 VLCD - 0.9 VLCD - 0.9 VLCD - 0.9 0.9 0.9 0.9 1/2 VLCD + 0.9 2/3 VLCD + 0.9 1/3 VLCD + 0.9 2/3 VLCD + 0.9 1/3 VLCD + 0.9 60 5 460 5 200 120 min typ 0.1 VDD 5.0 max Unit V A A V V V V V V V V V V V kHz A A A A A
Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.)
VLCD
VLCD1 To the common segments drivers VLCD2 Except these resistors
VSS
A06588
Figure 1
No. 6235-3/14
LC75844M
1. When CL is stopped at the low level
VIH CE toH CL
VIH 50% VIL
VIL toL
tr DI
VIH VIL
tf
tcp
tcs
tch
tds
tdh
A12597
2. When CL is stopped at the high level
VIH CE toL CL tf DI tds tdh
A12598
VIL toH
VIH 50% VIL
tr
VIH VIL
tcp
tcs
tch
Figure 2
Block Diagram
COM3 COM2 COM4 COM1 S5 S4/P4 S3/P3 S2/P2 S1/P1 SEGMENT DRIVER & LATCH SHIFT REGISTER ADDRESS DETECTOR CE
A12599
COMMON DRIVER INH CLOCK GENERATOR
OSC VDD VLCD VLCD1 VLCD2 VSS
DI
CL
S22 S21
No. 6235-4/14
LC75844M
Pin Functions
Pin S1/P1 to S4/P4 S5 to S22 COM1 COM2 COM3 COM4 OSC CE CL DI Pin No. 1 to 4 5 to 22 23 24 25 26 32 34 35 36 Function Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S4/P4 can be used as general-purpose output ports when so set up by the control data. Common driver outputs. The frame frequency fO is given by: fO = (fOSC/512) Hz. Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. Serial data transfer inputs. These pins are connected to the control microprocessor. CE: Chip enable CL: Synchronization clock DI: Transfer data Active I/O Handling when unused Open
--
O
--
O
Open
-- H
I/O
VDD
I --
GND
INH
33
Display off control input *INH = low (VSS): Off S1/P1 to S4/P4 = Low (These pins are forcibly set to the segment output port function and fixed at the VSS level.) S5 to S22 = Low (VSS), COM1 to COM4 = Low (VSS) *INH = high (VDD): On Note that serial data transfers can be performed when the display is forced off by this pin. Used to apply the LCD drive 2/3 bias voltage externally. This pin must be connected to VLCD2 when 1/2 bias drive is used. Used to apply the LCD drive 1/3 bias voltage externally. This pin must be connected to VLCD1 when 1/2 bias drive is used. Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V. Ground pin. Connect to ground.
L
I
GND
VLCD1 VLCD2 VDD VLCD VSS
29
--
I
Open
30 27 28 31
-- -- -- --
I -- -- --
Open -- -- --
Serial Data Transfer Format
1. When CL is stopped at the low level
CE
CL
DI
0
0
1
0
0
0
1
0
D1
D2 D3
D37 D38 D39 D40 D41 D42 D43 D44 0 Display data 44 bits
0
0
0
0
P0 P1 P2 DR SC BU
0
B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits
Control data 11 bits
DD 1 bit
0
0
1
0
0
0
1
0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0 Display data 44 bits
0
0
0
0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits
Fixed data 11 bits
DD 1 bit
A12600
Note: DD ... Direction data
No. 6235-5/14
LC75844M 2. When CL is stopped at the high level
CE
CL
DI
0
0
1
0
0
0
1
0 A3
D1 D2 D3
D37 D38 D39 D40 D41 D42 D43 D44 0 Display data 44 bits
0
0
0
0
P0 P1 P2 DR SC BU
0
B0 B1 B2 B3 A0 A1 A2 CCB address 8 bits
Control data 11 bits
DD 1 bit
0
0
1
0
0
0
1
0 A3
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0 Display data 44 bits
0
0
0
0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 CCB address 8 bits
Fixed data 11 bits
DD 1 bit
Note: DD ... Direction data
A12601
* * * * * *
CCB address...............44H D1 to D88...................Display data P0 to P2 ......................Segment output port/general-purpose output port switching control data DR ..............................1/2 bias drive or 1/3 bias drive switching control data SC...............................Segments on/off control data BU ..............................Normal mode/power-saving mode control data
Serial Data Transfer Examples
* When 45 or more segments are used, all 112 bits of the serial data must be sent.
8 bits
0 0 1 0 0 0 1 0 D1 D2 D3
56 bits
D37 D38 D39 D40 D41 D42 D43 D44 0 0 0 0 0 P0 P1 P2 DR SC BU 0
B0 B1 B2 B3 A0 A1 A2 A3
0
0
1
0
0
0
1
0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0
0
0
0
0
0
0
0
0
0
0
1
A12602
B0 B1 B2 B3 A0 A1 A2 A3
* When fewer than 45 segments are used, only 56 bits of serial data need to be sent. However, the display data D1 to D44 and the control data must be sent.
8 bits
0 0 1 0 0 0 1 0 D1 D2 D3
56 bits
D37 D38 D39 D40 D41 D42 D43 D44 0 0 0 0 0 P0 P1 P2 DR SC BU 0
A12603
B0 B1 B2 B3 A0 A1 A2 A3
Note: When fewer than 45 segments are used, transfers such as that shown in the figure below cannot be used.
8 bits
0 0 1 0 0 0 1 0 D45 D46 D47
56 bits
D81 D82 D83 D84 D85 D86 D87 D88 0 0 0 0 0 0 0 0 0 0 0 1
A12604
B0 B1 B2 B3 A0 A1 A2 A3
No. 6235-6/14
LC75844M
Control Data Functions
1. P0 to P2: Segment output port/general-purpose output port switching control data. These control data bits switch the S1/P1 to S4/P4 output pins between their segment output port and general-purpose output port functions.
Control data P0 0 0 0 0 1 P1 0 0 1 1 0 P2 0 1 0 1 0 S1/P1 S1 P1 P1 P1 P1 Output pin states S2/P2 S2 S2 P2 P2 P2 S3/P3 S3 S3 S3 P3 P3 S4/P4 S4 S4 S4 S4 P4
Note: Sn (n = 1 to 4): Segment output ports Pn (n = 1 to 4): General-purpose output ports
Also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below.
Output pin S1/P1 S2/P2 S3/P3 S4/P4 Corresponding display data D1 D5 D9 D13
For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level (VLCD) when the display data D13 is 1, and will output a low level (VSS) when D13 is 0. 2. DR: 1/2 bias drive or 1/3 bias drive switching control data This control data bit selects either 1/2 bias drive or 1/3 bias drive.
DR 0 1 Drive type 1/3 bias drive 1/2 bias drive
3. SC: Segments on/off control data This control data bit controls the on/off state of the segments.
SC 0 1 Display state On Off
However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 4. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode.
BU 0 1 Normal mode Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the S1/P1 to S4/P4 output pins that are set to be general-purpose output ports by the control data P0 to P2 can be used as generalpurpose output ports.) Mode
No. 6235-7/14
LC75844M
Display Data to Segment Output Pin Correspondence
Segment output pin S1/P1 S2/P2 S3/P3 S4/P4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 COM1 D1 D5 D9 D13 D17 D21 D25 D29 D33 D37 D41 D45 D49 D53 D57 D61 D65 D69 D73 D77 D81 D85 COM2 D2 D6 D10 D14 D18 D22 D26 D30 D34 D38 D42 D46 D50 D54 D58 D62 D66 D70 D74 D78 D82 D86 COM3 D3 D7 D11 D15 D19 D23 D27 D31 D35 D39 D43 D47 D51 D55 D59 D63 D67 D71 D75 D79 D83 D87 COM4 D4 D8 D12 D16 D20 D24 D28 D32 D36 D40 D44 D48 D52 D56 D60 D64 D68 D72 D76 D80 D84 D88
Note: This applies to the case where the S1/P1 to S4/P4 output pins are set to be segment output ports.
For example, the table below lists the segment output states for the S11 output pin.
Display data D41 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D42 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D43 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D44 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Segment output pin (S11) state The LCD segments corresponding to COM1 to COM4 are off. The LCD segment corresponding to COM4 is on. The LCD segment corresponding to COM3 is on. The LCD segments corresponding to COM3 and COM4 are on. The LCD segment corresponding to COM2 is on. The LCD segments corresponding to COM2 and COM4 are on. The LCD segments corresponding to COM2 and COM3 are on. The LCD segments corresponding to COM2, COM3 and COM4 are on. The LCD segment corresponding to COM1 is on. The LCD segments corresponding to COM1 and COM4 are on. The LCD segments corresponding to COM1 and COM3 are on. The LCD segments corresponding to COM1, COM3 and COM4 are on. The LCD segments corresponding to COM1 and COM2 are on. The LCD segments corresponding to COM1, COM2 and COM4 are on. The LCD segments corresponding to COM1 to COM3 are on. The LCD segments corresponding to COM1 to COM4 are on.
No. 6235-8/14
LC75844M
1/4 Duty, 1/2 Bias Drive Technique
fosc [Hz] 512 COM1 VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V VLCD VLCD1, VLCD2 0V
COM2
COM3
COM4 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2,COM3, and COM4 are on.
A12605
1/4 Duty, 1/2 Bias Waveforms
No. 6235-9/14
LC75844M
1/4 Duty, 1/3 Bias Drive Technique
fosc [Hz] 512 VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V
COM1
COM2
COM3
COM4
LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2,COM3, and COM4 are on.
A12606
1/4 Duty, 1/3 Bias Waveforms
No. 6235-10/14
LC75844M
The INH pin and Display Control
Since the IC internal data (the display data and the control data) is undefined when power is first applied, applications should set the INH pin low at the same time as power is applied to turn off the display (This sets the S1/P1 to S4/P4, S5 to S22, and COM1 to COM4 to the VSS level.) and during this period send serial data from the controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. (See Figure 3.)
Notes on the Power On/Off Sequences
Applications should observe the following sequence when turning the LC75844M power on and off. * At power on: Logic block power supply (VDD) on LCD driver block power supply (VLCD) on * At power off: LCD driver block power supply (VLCD) off Logic block power supply (VDD) off However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time.
Display and control data transfer Internal data D1 to D44 P0 to P2 DR, SC, BU Undefined Defined Undefined Note: t1 0 t2 > 0 t3 0 (t2 > t3) tc ... 10 s min
Internal data (D45 to D88)
Undefined
Defined
Undefined
Figure 3
Notes on Controller Transfer of Display Data
Since the LC75844M accept display data (D1 to D88) divided into two separate transfer operations, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality.
No. 6235-11/14
LC75844M
Sample Application Circuit 1
1/2 Bias (for use with normal panels)
General-purpose output ports Used for functions such as backlight control
C 0.047 F
From the microcontroller
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
Sample Application Circuit 2
1/2 Bias (for use with large panels)
General-purpose output ports Used for functions such as backlight control
10 k R 1 k C 0.047 F
From the microcontroller
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
LCD panel (up to 88 segments)
LCD panel (up to 88 segments)
No. 6235-12/14
LC75844M
Sample Application Circuit 3
1/3 Bias (for use with normal panels)
General-purpose output ports Used for functions such as backlight control
C 0.047 F
From the microcontroller
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
Sample Application Circuit 4
1/3 Bias (for use with large panels)
General-purpose output ports Used for functions such as backlight control
10 k R 1 k C 0.047 F
From the microcontroller
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.
LCD panel (up to 88 segments)
LCD panel (up to 88 segments)
No. 6235-13/14
LC75844M
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of September, 1999. Specifications and information herein are subject to change without notice. PS No. 6235-14/14

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